MTech — 43 projects
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VLSI Design of an Approximate Adder for Low-Power AI Accelerators
Design approximate arithmetic units and measure accuracy-power trade-offs. You will learn accelerator design methodology and research evaluation.…
Formal Verification of an AXI Protocol Bridge
Verify a bus bridge with assertions and formal proofs. You will learn property specification and coverage-driven closure.…
Hardware Trojan Detection in ICs Using ML Side-Channel Analysis
Detect trojans from power side-channel features. You will learn hardware security methodology and classifier evaluation.…
Network-on-Chip Router — High-Throughput Design and Detailing
Carry out the analysis and design of the network-on-chip router with high-throughput Design and a complete design report. You will learn benchmark design, research methodology and baseline comparison.…
Approximate Computing Arithmetic Units — Design and AXI Interface
Complete the design of the approximate computing arithmetic units with AXI Interface, full calculations and detailed drawings. You will learn benchmark design, reproducible experiment design and experimental design.…
Secure Boot Controller — Design and AXI Interface
Carry out the analysis and design of the secure boot controller with AXI Interface and a complete design report. You will learn ablation studies, technical paper writing and baseline comparison.…
Hardware Accelerator for Image Filters — Design and High-Throughput Design
Complete the design of the hardware accelerator for image filters with high-throughput Design, full calculations and detailed drawings. You will learn experimental design, benchmark design and baseline comparison.…
Display Controller for Low-Cost Panels — Clock Gating and Detailing
Carry out the analysis and design of the display controller for low-cost panels with clock Gating and a complete design report. You will learn experimental design, reproducible experiment design and literature review met…
Analysis and Design of Network-on-Chip Router with Configurable Parameters
Carry out the analysis and design of the network-on-chip router with configurable Parameters and a complete design report. You will learn literature review methods, ablation studies and reproducible experiment design.…
High-Speed Serializer Interface — Design and AXI Interface
Carry out the analysis and design of the high-speed serializer interface with AXI Interface and a complete design report. You will learn literature review methods, experimental design and technical paper writing.…
Design and Analysis of Low-Power FFT Engine
Carry out the analysis and design of the low-power FFT engine with DMA Support and a complete design report. You will learn error analysis, reproducible experiment design and baseline comparison.…
Analysis and Design of Sensor Hub Interface Bridge with Error Correction
Carry out the analysis and design of the sensor hub interface bridge with error Correction and a complete design report. You will learn ablation studies, technical paper writing and baseline comparison.…
Motor Control DSP Block — Low-Power Techniques and Detailing
Carry out the analysis and design of the motor control DSP block with low-power Techniques and a complete design report. You will learn statistical significance testing, error analysis and experimental design.…
Network-on-Chip Router — Clock Gating and Detailing
Carry out the analysis and design of the network-on-chip router with clock Gating and a complete design report. You will learn ablation studies, statistical significance testing and benchmark design.…
Design of RISC-V Core for Embedded Controllers with Clock Gating
Complete the design of the RISC-V core for embedded controllers with clock Gating, full calculations and detailed drawings. You will learn benchmark design, technical paper writing and research methodology.…
Design of Error-Correcting Memory Controller with Pipelined Architecture
Complete the design of the error-correcting memory controller with pipelined Architecture, full calculations and detailed drawings. You will learn ablation studies, error analysis and baseline comparison.…
Error-Correcting Memory Controller — DMA Support and Detailing
Complete the design of the error-correcting memory controller with DMA Support, full calculations and detailed drawings. You will learn reproducible experiment design, research methodology and statistical significance te…
Display Controller for Low-Cost Panels Design with UVM Verification
Carry out the analysis and design of the display controller for low-cost panels with UVM Verification and a complete design report. You will learn experimental design, literature review methods and benchmark design.…
Error-Correcting Memory Controller — Low-Power Techniques and Detailing
Carry out the analysis and design of the error-correcting memory controller with low-power Techniques and a complete design report. You will learn research methodology, technical paper writing and statistical significanc…
Secure Boot Controller — Configurable Parameters and Detailing
Complete the design of the secure boot controller with configurable Parameters, full calculations and detailed drawings. You will learn ablation studies, statistical significance testing and baseline comparison.…
Analysis and Design of Network-on-Chip Router with Pipelined Architecture
Complete the design of the network-on-chip router with pipelined Architecture, full calculations and detailed drawings. You will learn research methodology, literature review methods and benchmark design.…
Approximate Computing Arithmetic Units — UVM Verification and Detailing
Carry out the analysis and design of the approximate computing arithmetic units with UVM Verification and a complete design report. You will learn benchmark design, statistical significance testing and experimental desig…
Design of Cache Coherence Controller with Formal Checks
Complete the design of the cache coherence controller with formal Checks, full calculations and detailed drawings. You will learn baseline comparison, reproducible experiment design and research methodology.…
Analysis and Design of RISC-V Core for Embedded Controllers with Low-Power Techniques
Complete the design of the RISC-V core for embedded controllers with low-power Techniques, full calculations and detailed drawings. You will learn reproducible experiment design, statistical significance testing and tech…
Design of Secure Boot Controller with High-Throughput Design
Complete the design of the secure boot controller with high-throughput Design, full calculations and detailed drawings. You will learn reproducible experiment design, technical paper writing and error analysis.…
Cache Coherence Controller — Design and Configurable Parameters
Complete the design of the cache coherence controller with configurable Parameters, full calculations and detailed drawings. You will learn experimental design, literature review methods and ablation studies.…
Analysis and Design of Hardware Accelerator for Image Filters with Low-Power Techniques
Complete the design of the hardware accelerator for image filters with low-power Techniques, full calculations and detailed drawings. You will learn statistical significance testing, ablation studies and error analysis.…
Sensor Hub Interface Bridge — AXI Interface and Detailing
Carry out the analysis and design of the sensor hub interface bridge with AXI Interface and a complete design report. You will learn baseline comparison, error analysis and experimental design.…
Network-on-Chip Router — Design and AXI Interface
Complete the design of the network-on-chip router with AXI Interface, full calculations and detailed drawings. You will learn technical paper writing, error analysis and ablation studies.…
Design of Secure Boot Controller with UVM Verification
Carry out the analysis and design of the secure boot controller with UVM Verification and a complete design report. You will learn experimental design, ablation studies and benchmark design.…
Analysis and Design of Cache Coherence Controller with UVM Verification
Carry out the analysis and design of the cache coherence controller with UVM Verification and a complete design report. You will learn literature review methods, statistical significance testing and research methodology.…
Sensor Hub Interface Bridge — Design and Low-Power Techniques
Carry out the analysis and design of the sensor hub interface bridge with low-power Techniques and a complete design report. You will learn research methodology, statistical significance testing and literature review met…
Hardware Accelerator for Image Filters — Formal Checks and Detailing
Complete the design of the hardware accelerator for image filters with formal Checks, full calculations and detailed drawings. You will learn technical paper writing, reproducible experiment design and error analysis.…
Design of a High-Throughput LDPC Decoder for 5G Baseband
Build a layered LDPC decoder that meets 5G throughput at practical silicon area. You will learn channel coding hardware, iterative decoding and telecom standards.…
3D IC Integration: Thermal and Timing Challenges Study
Study how stacking dies changes thermal behaviour and timing closure. You will learn 3D integration, thermal analysis and EDA methodology.…
Low-Power SRAM Design with Assist Circuits at Advanced Nodes
Design SRAM that stays reliable at low voltage with read/write assists. You will learn memory design, variation analysis and circuit techniques.…
Design of a High-Speed SerDes Transmitter: Concept and Simulation
Design a multi-gigabit transmitter with equalisation for lossy channels. You will learn high-speed design, signal integrity and mixed-signal practice.…
Formal Property Verification of a Cache Coherence Protocol
Prove coherence properties formally and find the corner cases simulation missed. You will learn formal verification, protocol design and property specification.…
Approximate Arithmetic Units for Image Processing Pipelines
Design approximate arithmetic that saves power where images forgive errors. You will learn approximate computing, quality-energy trade-offs and circuit design.…
Hardware Design of a Post-Quantum Cryptography Accelerator (Kyber)
Accelerate lattice-based cryptography for the post-quantum transition. You will learn cryptographic hardware, NTT algorithms and PQC standards.…
Clock Tree Synthesis Optimisation for Low Skew
Optimise clock trees for skew, power and robustness across corners. You will learn physical design, CTS methods and sign-off analysis.…
Design of a RISC-V Vector Extension Unit
Build a vector unit that accelerates data-parallel kernels measurably. You will learn vector architecture, RTL design and benchmarking.…
Aging and Reliability Analysis of FinFET Circuits
Study how FinFET circuits age and design margins that keep them reliable. You will learn reliability physics, aging models and design margins.…